Field of the Invention
The invention relates to a non-volatile semiconductor memory device; particularly, the invention relates to a programming operation and an erasing operation of a flash memory.
Description of Related Art
Flash memories are commonly applied in digital cameras, smartphones, and other electronic devices as storage devices. The market requires the flash memories to be minimized in size and maximized in storage space, high in speed, and low in power consumption. Further, it also requires the flash memories to have the capability of allowing certain data to be rewritten several times, data retention, and so forth.
In the typical flash memories, electrons are accumulated in the floating gate when the data are being programmed, such that the threshold voltage of the memory cell shifts towards the positive direction. The electrons are released from the floating gate when the data are being erased, such that the threshold voltage of the memory cell shifts towards the negative direction. Such programming and erasing operations need to be put under control by making the threshold value of the memory cell enter a distribution width of “0” or “1”. Moreover, the memory cell needs to further enter a distribution width of “00,” “01,” “10,” or “11” to control the programming and erasing operations when the memory cell stores a plurality of bits.
In the field of flash memories, it is known that the endurance and the degradation of data retention become more drastically when the memory cell is reduced in size (Patent Literature 1 and Non-patent Literature 1). FIG. 1 is a chart showing a programming/erasing cycle, wherein the longitudinal axis shows a threshold value of the memory cell, and the horizontal axis shows the number of programming/erasing cycle times. Here, ΔVSS is subthreshold slope (SS) degradation, and ΔVMG is midgap voltage (VMG) shifts. One can know from FIG. 1 that the threshold value Vt of the programming/erasing memory cell rarely varies when the number of the cycle times ranges around 10 to 1000. The threshold value Vt of the programming/erasing memory cell, however, gradually shifts towards the positive direction when the number of the cycle times passes around thousands. It is speculated that one of the reasons to such phenomena is: the electrons are trapped by a gate oxide film while the number of the programming/erasing cycle times increases. The gate oxide film itself undergoes a degradation due to the tunneling of the electrons. In Patent Literature 1, the voltage data of the programming pulses that reflect the properties of the programming/erasing cycle are stored in a spare region and are used to process the programming operation and the erasing operation, such that the excessive stress to the memory cell is repressed, or the erasing time is shortened.